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Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer | 論文
- Circuit Performance Degradation of Switched-Capacitor Circuit with Bootstrapped Technique due to Gate-Oxide Overstress in a 130-nm CMOS Process
- Low-Capacitance and Fast Turn-on SCR for RF ESD Protection
- Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits
- Novel Implantation Method to Improve Machine-Model Electrostatic Discharge Robustness of Stacked N-Channel Metal-Oxide Semiconductors (NMOS) in Sub-Quarter-Micron Complementary Metal-Oxide Semiconductors (CMOS) Technology : Semiconductors
- Design and Implementation of Readout Circuit with Threshold Voltage Compensation on Glass Substrate for Touch Panel Applications
- MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process(Semiconductor Materials and Devices)
- A CMOS Bandgap Reference Circuit for Sub-1-V Operation without Using Extra Low-Threshold-Voltage Device(Electronic Circuits)
- Dummy-Gate Structure to Improve Turn-on Speed of Silicon-Controlled Rectifier (SCR) Device for Effective Electrostatic Discharge (ESD) Protection
- High-Current Characterization of Polysilicon Diode for Electrostatic Discharge Protection in Sub-Quarter-Micron Complementary Metal Oxide Semiconductor Technology
- Active Electrostatic Discharge (ESD) Device for On-Chip ESD Protection in Sub-Quarter-Micron Complementary Metal-Oxide Semiconductor (CMOS) Process