MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process(Semiconductor Materials and Devices)

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概要

• 論文の詳細を見る

• New diode structures without the field-oxide boundary across the p/n junction for ESD protection are proposed. A NMOS (PMOS) is especially inserted into the diode structure to form the NMOS-bounded (PMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. The proposed N (P) MOS-bounded diodes can provide more efficient ESD protection to the internal circuits, as compared to the other diode structures. The N (P) MOS-bounded diodes can be used in the I/O ESD protection circuits, power-rail ESD clamp circuits, and the ESD conduction cells between the separated power lines. From the experimental results, the human-body-model ESD level of ESD protection circuit with the proposed N (P) MOS-bounded diodes is greater than 8 kV in a 0.35-μm CMOS process.

• 社団法人電子情報通信学会の論文
• 2005-03-01

著者

• Ker Ming

  Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer

• LIN Kun

  Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ

• CHUANG Che

  ESD and Product Engineering Department, SoC Technology Center, Industrial Technology Research Instit

• Lin K‐h

  Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer

• Chuang Che

  Esd And Product Engineering Department Soc Technology Center Industrial Technology Research Institut

関連論文

• MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process(Semiconductor Materials and Devices)

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