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Center for Interdisciplinary Research, Tohoku University | 論文
- ナトリウムフラックス法により成長したGaN単結晶および多結晶の光電気化学特性(E)
- Impact of floating body type DRAM with the vertical MOSFET (Silicon devices and materials)
- Impact of floating body type DRAM with the vertical MOSFET (Electron devices)
- Study on impurity distribution dependence of electron-dynamics in vertical MOSFET (Silicon devices and materials)
- Direct Silica-Coating of Quantum Dots
- Evaluation of 1/f noise characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET (Electron devices)
- Study on impurity distribution dependence of electron-dynamics in vertical MOSFET (Electron devices)
- Growth of Al_2O_3/Y_3Al_5O_ Eutectic Fiber by Micro-Pulling-Down Method and Its High-Temperature Strength and Thermal Stability
- Time Dependence of the Growth Morphology of GaN Single Crystals Prepared in a Na-Ga Melt
- Dissolution and Recrystallization of GaN in Molten Na
- Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET
- Study on Quantum Electro-Dynamics in Vertical MOSFET
- Tailoring Thermally Induced Nano-Quasicrystallization and Deformation-Assisted Nanocrystallization for Mechanical Property Improvement in Zr-Al-Ni-Cu-Pd Bulk Metallic Glasses
- Real-time monitoring of initial oxidation of Si(110)-16×2 surface by Si 2p Photoemission spectroscopy
- Real-Time Observation of Initial Thermal Oxidation on Si(110)-16×2 Surfaces by O1s Photoemission Spectroscopy Using Synchrotron Radiation
- Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET(Session 7A : Gate Oxides)
- The Analysis of Temperature Dependency of the Mobility In High-k/Metal Gate MOSFET and the Performance on its CMOS Inverter(Session 7A : Gate Oxides)
- The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure.(Session 8A : Memory 2)
- The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure.(Session 8A : Memory 2)
- Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation(Session 7B : Si IC and Circuit Technology)