Enomoto Tadayoshi | Chuo Univ.

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著作論文

A Low Dynamic Power 90-nm CMOS Motion Estimation Processor Implementing Dynamic Voltage and Frequency Scaling Scheme and Fast Motion Estimation Algorithm Called Adaptively Assigned Breaking-off Condition Search(International Workshop on Advanced Image Tec
Low-Voltage, Low-Power, High-Speed 0.25-μm GaAs HEMT Delay Flip-Flops
Low Dynamic Power and Low Leakage Power Techniques for CMOS Motion Estimation Circuits (Low Power Techniques, VLSI Design Technology in the Sub-100nm Era)
Low-Dynamic-Power and Low-Leakage-Power Techniques for CMOS Square-Root Circuit
Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array
FOREWORD (Special Issue on Low-Power LSI Technologies)
A Low Power Multimedia Processor Implementing Dynamic Voltage and Frequency Scaling Technique and Fast Motion Estimation Algorithm Called "Adaptively Assigned Breaking-Off Condition (A2BC)"
A Low Power Multimedia Processor Implementing Dynamic Voltage and Frequency Scaling Technique and Fast Motion Estimation Algorithm Called "Adaptively Assigned Breaking-Off Condition (A^2BC)"

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