Low-Voltage, Low-Power, High-Speed 0.25-μm GaAs HEMT Delay Flip-Flops

概要

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Four different types of GaAs HEMT DCFL static delay latches based on NOR gates were developed. Eight different types of low-voltage, low-power, high-speed delay flip-flops (D-FFs) were constructed using two delay latches of different types. These delay latches and D-FFs were designed using 0.25-μm n-AIGaAs/i-InGaAs HEMT technology, and their characteristics were evaluated by SPICE simulation. A positive-edge D-FF, called "1P0P, " was fabricated and tested. Its operating clock frequency, power dissipation, power・delay product, and phase margin were measured as a function of supply voltage V_D. The dissipation was almost proportional to V_D for V_D up to 1.2V. The "1P0P" D-FF consumed only 2.03 mW at a clock frequency of 5.17GHz (i.e., at a data rate of 5.17Gbps) and a V_D of 0.6V, so the power・delay product was 0.196pJ. For a (2^9-1) pseudo-random signal, a maximum frequency of 7.15GHz was obtained at a V_D of 1.1V, with dissipation of 6.02mW and an error rate of less than 10^<-9>. Clear, wide eye openings were obtained at frequencies up to 7.15GHz. A sufficiently high phase margin of 180° was obtained with a data rate of 5 Gbps at a V_D of 0.6V.
社団法人電子情報通信学会の論文
2000-11-25