Han Yinhe | Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy
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概要
- HAN Yinheの詳細を見る
- 同名の論文著者
- Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academyの論文著者
関連著者
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Li Huawei
Institute Of Computing Technology Chinese Academy Of Sciences
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Han Yinhe
Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy
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Li Xiaowei
Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy Of Sciences
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Han Yinhe
Institute Of Computing Technology Chinese Academy Of Sciences
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Li Xiaowei
Institute Of Computing Technology Chinese Academy Of Sciences
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WEN Xiaoqing
Kyushu Institute of Technology
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HU Yu
Institute of Computing Technology, Chinese Academy of Sciences
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LI Huawei
Institute of Computing Technology, Chinese Academy of Sciences
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WEN Xiaoqing
Faculty of Computer Science and Systems Engineering, Kyushu Institute of Technology
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Hu Yu
Institute Of Computing Technology Chinese Academy Of Sciences
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Wen Xiaoqing
Faculty Of Computer Science And Systems Engineering Kyushu Institute Of Technology
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Hu Yu
Institute Of Biomedical Engineering Central South University
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Xiaoqing Wen
Department Of Information Engineering Mining College Akita University
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CHANDRA Anshuman
Synopsys, Inc.
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Li Xiaowei
Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academi
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Han Yinhe
Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy
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Li Huawei
Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academi
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Chandra Anshuman
Synopsys Inc.
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Fu Binzhang
Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy
著作論文
- Compression/Scan Co-design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time(Dependable Computing)
- Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores(Dependable Computing)
- A New Multiple-Round Dimension-Order Routing for Networks-on-Chip