Tashiro Daisuke | Hitachi Ltd.
スポンサーリンク
概要
関連著者
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Tashiro Daisuke
Hitachi Ltd.
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Barli Niko
Texas Instruments Japan Ltd.
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Sakai Shuichi
Graduate School Of Information Science And Technology The University Of Tokyo
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Iwama Chitaka
School Of Law The University Of Tokyo
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Tanaka H
Institute Of Information Security
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Tanaka Hidehiko
Department Of Bioresources Chemistry Faculty Of Agriculture Okayama University
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Tanaka Hidehiko
Institute Of Information Security
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Hung Luong
Graduate School Of Information Science And Technology The University Of Tokyo
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BARLI NIKO
Texas Instruments Japan, Ltd.
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SAKAI Shuichi
Graduate Shool of Information Science and Technology, The University of Tokyo
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TANAKA Hidehiko
Institute for Chemical Research, Kyoto University
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Tanaka Hidehiko
Graduate School of Electrical Engineering The University of Tokyo
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BARLI NIKO
Graduate School of Information Science and Technology, The University of Tokyo
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TASHIRO DAISUKE
Graduate School of Information Science and Technology, The University of Tokyo
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Hatta Naoya
Graduate School Of Engineering Hokkaido University
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MIURA HIDEYUKI
Graduate School of Information Science and Technology, The University of Tokyo
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IWAMA CHITAKA
Graduate School of Information Science and Technology, The University of Tokyo
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Hatta Naoya
Graduate School Of Information Science And Technology The University Of Tokyo
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Mine H
Graduate School Of Information Science And Technology The University Of Tokyo:(present Address)east
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HATTA Naoya
Graduate School of Engineering, Hokkaido University
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IWAMA CHITAKA
School of Law, the University of Tokyo
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HATTA NAOYA
東京大学
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BARLI NIKO
日本テキサス・インスツルメンツ
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IWAMA CHITAKA
東京大学
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HUNG LUONG
東京大学
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TASHIRO DAISUKE
東京大学
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SAKA SHUICHI
東京大学
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TANAKA HIDEHIKO
情報セキュリティ大学院大学
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Hatta Naoya
Graduate School of Information Science and Technology, the University of Tokyo
著作論文
- Cache Coherence Strategies for Speculative Multithreading CMPs : Characterization and Performance Study(Processor Architecture)
- Bus Serialization for Reducing Power Consumption(Processor Architecture)
- Bus Serialization for Reducing Power Consumption
- A Hardware/Sofware Approach for Thread Level Control Speculation (計算機アーキテクチャ研究報告 2002年並列/分散/協調処理に関する『湯布院』サマー・ワークショップ(SWoPP湯布院2002))
- Dynamic Thread Extension for Speculative Multithreading Architectur (計算機アーキテクチャ 研究報告 2001年並列/分散/協調処理に関する『沖縄』サマー・ワークショップ(SWoPP「沖縄」2001)--研究会・連続同時開催--テーマ:並列/分散/協調システムの支援アーキテクチャ技術と評価)
- Bus Serialization for Reducing Power Consumption
- Bus Serialization for Reducing Power Consumption