Nishimura Kazuyoshi | Ntt Microsystem Integration Laboratories
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概要
関連著者
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Nishimura Kazuyoshi
Ntt Microsystem Integration Laboratories
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OHTOMO Yusuke
NTT Microsystem Integration Laboratories, NTT Corporation
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NOGAWA Masafumi
NTT Microsystem Integration Laboratories, NTT Corporation
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NISHIMURA Kazuyoshi
NTT Microsystem Integration Laboratories, NTT Corporation
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Ohtomo Yusuke
Ntt Microsystem Integration Laboratories Ntt Corporation
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Nogawa Masafumi
Ntt Microsystem Integration Laboratories Ntt Corporation
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Nishimura Kazuyoshi
Ntt Microsystem Integration Laboratories Ntt Corporation
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Ohtomo Yusuke
Ntt Microsystem Integration Laboratories Ntt Corp.
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KIMURA Shunji
NTT Access Network Service Systems Laboratories, NTT Corporation
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YOSHIDA Tomoaki
NTT Access Network Service Systems Laboratories, NTT Corporation
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KAWAMURA Tomoaki
NTT Microsystem Integration Laboratories, NTT Corporation
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TOGASHI Minoru
NTT Microsystem Integration Laboratories, NTT Corporation
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KUMOZAKI Kiyomi
NTT Access Network Service Systems Laboratories, NTT Corporation
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Kumozaki Kiyomi
Ntt Access Network Service Systems Laboratories Ntt Corporation
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Kimura Shunji
Ntt Access Network Service Systems Laboratories Ntt Corporation
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Togashi Minoru
Ntt Microsystem Integration Laboratories Ntt Corporation
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Yoshida Tomoaki
Ntt Access Network Service Systems Laboratories Ntt Corporation
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Kawamura Tomoaki
Ntt Microsystem Integration Laboratories Ntt Corporation
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SATO Yasuhiro
NTT Microsystem Integration Laboratories
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ISHIHARA Takako
NTT Microsystem Integration Laboratories
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Kado Yuichi
Ntt Micro System Integration Laboratories
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KOIZUMI Hiroshi
NTT Microsystem Integration Laboratories, NTT Corporation
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Koizumi Hiroshi
Ntt Microsystem Integration Laboratories Ntt Corporation
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Tsuchiya Toshiaki
Interdisciplinary Faculty Of Science And Engineering Shimane University
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Nishimura Kazuyoshi
NTT Microsystem Integration Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198, Japan
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Ishihara Takako
NTT Microsystem Integration Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198, Japan
著作論文
- A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs
- A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-μm CMOS-SOI
- Body-Charge-Induced Switching Characteristics in Fully Depleted Silicon-on-Insulator Digital Circuits