Koizumi Hiroshi | Ntt Microsystem Integration Laboratories Ntt Corporation

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概要

• KOIZUMI Hiroshiの詳細を見る
• 同名の論文著者
• Ntt Microsystem Integration Laboratories Ntt Corporationの論文著者

関連著者

• Koizumi Hiroshi

  Ntt Microsystem Integration Laboratories Ntt Corporation

• Ohtomo Yusuke

  Ntt Microsystem Integration Laboratories Ntt Corporation

• KOIZUMI Hiroshi

  NTT Microsystem Integration Laboratories, NTT Corporation

• Ohtomo Yusuke

  Ntt Microsystem Integration Laboratories Ntt Corp.

• TOCHIKUBO Osamu

  Yokohama City University

• OHTOMO Yusuke

  NTT Microsystem Integration Laboratories, NTT Corporation

• NOGAWA Masafumi

  NTT Microsystem Integration Laboratories, NTT Corporation

• NISHIMURA Kazuyoshi

  NTT Microsystem Integration Laboratories, NTT Corporation

• SHIMADA Junichi

  NTT Microsystem Integration Laboratories

• Nogawa Masafumi

  Ntt Microsystem Integration Laboratories Ntt Corporation

• Kamitsuna Hideki

  Ntt Photonics Laboratories Ntt Corporation

• Nishimura Kazuyoshi

  Ntt Microsystem Integration Laboratories Ntt Corporation

• Nishimura Kazuyoshi

  Ntt Microsystem Integration Laboratories

• Terada Jun

  Ntt Microsystem Integration Laboratories Ntt Corporation

• Uenishi Yuji

  Ntt Microsystem Integration Laboratories

• KATSURAI Hiroaki

  NTT Microsystem Integration Laboratories, NTT Corporation

• SHIBATA Tsugumichi

  NTT Microsystem Integration Laboratories, NTT Corporation

• Terada Jun

  Ntt Microsystem Integration Laboratories Ntt Corp.

• Katsurai Hiroaki

  Ntt Microsystem Integration Laboratories Ntt Corporation

• Shibata Tsugumichi

  Ntt Microsystem Integration Laboratories Ntt Corporation

• Shibata Tsugumichi

  Ntt Microsystem Integration Laboratories Ntt Corp.

• Tochikubo Osamu

  Yokohama City University Graduate School of Medicine, 3-9 Fukuura, Kanagawa-ku, Yokohama 236-0004, Japan

• Shimada Junichi

  NTT Microsystem Integration Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198, Japan

• Koizumi Hiroshi

  NTT Microsystem Integration Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198, Japan

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著作論文

• A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-μm CMOS-SOI
• An Injection-Controlled 10-Gb/s Burst-Mode CDR Circuit for a 1G/10G PON System
• A Ubiquitous Blood Pressure Sensor Worn at the Ear

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