HORIBA Yasutaka | Kansai University

スポンサーリンク

概要

• HORIBA Yasutakaの詳細を見る
• 同名の論文著者
• Kansai Universityの論文著者

関連著者

• HORIBA Yasutaka

  Kansai University

• Terai Masayuki

  Faculty Of Informatics Osaka Gakuin University

• ARIMOTO Kazutami

  Renesas Technology

• MORISHITA Fukashi

  Renesas Technology Corp.

• NODA Hideyuki

  Renesas Technology Corp.

• DOSAKA Katsumi

  Renesas Technology Corp.

• KANAMOTO Toshiki

  Renesas Technology Corporation

• Noda H

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Dosaka K

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• ISHIKAWA Kiyoshi

  Renesas Technology Corporation

• SHIROTA Mitsutoshi

  Renesas Technology Corp.

• WATANABE Tetsuya

  Renesas Technology Corp

• TERAI Masayuki

  Osaka Gakuin University

• KUNIKIYO Tatsuya

  Renesas Technology Corp

• AJIOKA Yoshihide

  Renesas Technology Corp

• Hayashi I

  Renesas Technology Corp.

• Terai Masayuki

  Osaka Gakuin Univ. Suita‐shi Jpn

• GYOHTEN Takayuki

  System Core Technology Div. System Solution Business Group, Renesas Technology Co.

• Ishikawa Kiyoshi

  Renesas Technol. Corp. Itami‐shi Jpn

• HAYASHI Isamu

  Renesas Technology Corp.

• GYOHTEN Takayuki

  Renesas Technology Corp.

• OKAMOTO Mako

  Daioh Electric Corp.

• Noda H

  Hitachi Ltd. Kokubunji‐shi Jpn

• Dosaka Katsumi

  Renesas Electronics Corp. Itami‐shi Jpn

• Kunikiyo Tatsuya

  Mirai‐selete Sagamihara‐shi Jpn

• Gyohten Takayuki

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Kanamoto Toshiki

  Mirai‐selete Sagamihara‐shi Jpn

• Kanamoto Toshiki

  Renesas Technology Corp.

• Kanamoto Toshiki

  Renesas Design Corp.

• Arimoto Kazutami

  System Core Technology Div. Renesas Technology Corp.

• Morishita Fukashi

  System Core Technology Div. Renesas Technology Corp.

• Morishita Fukashi

  Renesas Technology Corporation

• Arimoto Kazutami

  Renesas Electronics Corp.

もっと見る 閉じる

著作論文

• A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures(Interconnect, VLSI Design and CAD Algorithms)
• An On-Chip Supply-Voltage Control System Considering PVT Variations for Worst-Caseless Lower Voltage SoC Design(Novel Device Architectures and System Integration Technologies)

スポンサーリンク