Omura Yasuhisa | NTT LSI Laboratories
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概要
関連著者
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Omura Yasuhisa
NTT LSI Laboratories
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KADO Yuichi
NTT Microsystem Integration Laboratories, NTT Corporation
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NAGASE Masao
NTT LSI Laboratories
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Omura Y
Electronics High-technology Research Center And Faculty Of Engineering Kansai University
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Omura Y
Ntt Lsi Laboratories
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Omura Yasuhisa
Electronics Department Kansai University
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Suzuki M
Kddi Res. And Dev. Lab. Inc. Kamifukuoka‐shi Jpn
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Suzuki Masao
NTT LSI Laboratories
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Kado Yuichi
NTT LSI Laboratories
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Koike Keiichi
NTT LSI Laboratories
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Izumi Katsutoshi
NTT LSI Laboratories
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Kado Yuichi
Ntt Microsystem Integration Laboratories
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Kado Yuichi
Ntt Microsystem Integration Laboratories Ntt Corporation
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Koike K
Ntt Systems Electronics Lab. Atsugi‐shi Jpn
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DOUSEKI Takakuni
NTT LSI Laboratories
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ISHIYAMA Toshihiko
NTT LSI Laboratories
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Aoyama Kazuo
Ntt Lsi Laboratories
著作論文
- Low-Temperature Drain Current Characteristics in Sub-10-nm-Thick SOI nMOSFET's on SIMOX (Separation by IMplanted OXygen) Substrates
- Abnormal Threshold Voltage Dependence on Gate Length in Ultrathin-Film n-Channel Metal-Oxide-Semiconductor Field-Effect Transistors (nMOSFET's) Using Separation by Implanted Oxygen (SIMOX) Technology
- A 1GHz/0.9mW CMOS/SIMOX Divide-by 128/129 Dual-Modulus Prescaler Using a Divide-by 2/3 Synchronous Counter
- An Experimental Full-CMOS Multigigahertz PLL LSI Using 0.4μm Gate Ultrathin-Film SIMOX Technology (Special Issue on Sub-Half Micron Si Device and Process Technologies)
- Two-Dimensionally Confined Carrier Injection Phenomena in Sub-10-nm-Thick SOI Insulated-Gate pn-Junction Devices
- Enhancement and Suppression of Band-to-Band Tunneling Current in Ultra-Thin nMOSFETs/SIMOX : Influence of Superficial Si Layer Thickness and It's Future Prospect
- Dependence of CMOS/SIMOX Inverter Delay Time on Gate Overlap Capacitance
- A Simple Model for Substrate Current Characteristics in Short-Channel Ultrathin-Film Metal-Oxide-Semiconductor Field-Effect Transistors by Separation by Implanted Oxygen