HUI XU | 慶大
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概要
関連著者
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ZHAO LEI
慶大
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HUI XU
慶大
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SUNATA Tetsuya
Department of Computer and Information Sciences, Tokyo University of Agriculture and Technology
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SUNATA TETSUYA
東京農工大
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NAMIKI MITARO
東京農工大
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Amano Hideharu
Keio Univ. Yokohama Jpn
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Amano Hideharu
慶大
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IKEBUCHI Daisuke
Faculty of Science and Technology, Keio University
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AMANO Hideharu
Faculty of Science and Technology, Keio University
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Zhao Lei
Graduate School Of Science And Technology Keio University
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SEKI NAOMI
慶大
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Hui Xu
Graduate School Of Science And Technology Keio University
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Ikebuchi Daisuke
Faculty Of Science And Technology Keio University
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LEI Zhao
Faculty of Science and Technology, Keio University
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XU Hui
Faculty of Science and Technology, Keio University
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SAITO YOSHIKI
慶大
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HASEGAWA YOHEI
慶大
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USAMI KIMIYOSHI
芝浦工大
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Amano Hideharu
Faculty Of Science And Technology Keio University
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Namiki Mitaro
Department Of Computer And Information Sciences Tokyo University Of Agriculture And Technology
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Sunata Tetsuya
Department Of Computer And Information Sciences Tokyo University Of Agriculture And Technology
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LEI Zhao
the Faculty of Science and Technology, Keio University
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XU Hui
the Faculty of Science and Technology, Keio University
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IKEBUCHI Daisuke
the Faculty of Science and Technology, Keio University
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SUNATA Tetsuya
the Department of Computer and Information Sciences, Tokyo University of Agriculture and Technology
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NAMIKI Mitaro
the Department of Computer and Information Sciences, Tokyo University of Agriculture and Technology
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AMANO Hideharu
the Faculty of Science and Technology, Keio University
著作論文
- Cache controller design with run-time power gating (計算機アーキテクチャ・2008年並列/分散/協調処理に関する『佐賀』サマー・ワークショップ(SWoPP佐賀2008)--研究会・連続同時開催)
- Reducing power of TLB with power-gating technique on microprocessor (計算機アーキテクチャ・2008年並列/分散/協調処理に関する『佐賀』サマー・ワークショップ(SWoPP佐賀2008)--研究会・連続同時開催)
- A Leakage Efficient Data TLB Design for Embedded Processors
- A Leakage Efficient Instruction TLB Design for Embedded Processors