Kishimoto Koji | Ulsi Device Development Laboratories Nec Corporation
スポンサーリンク
概要
関連著者
-
Kishimoto Koji
Ulsi Device Development Laboratories Nec Corporation
-
GOMI Hideki
ULSI Device Development Laboratories, NEC Corporation
-
Gomi Hideki
Ulsi Device Development Laboratories Nec Corporation
-
上野 啓司
埼玉大理
-
Yamada Y
Department Of Quantum Science And Energy Engineering Tohoku University
-
Yoshida Y
Department Of Energy Engineering And Science Nagoya University
-
Yamada Y
Akita Univ. Akita Jpn
-
Yamada Yuh
National Research Institute For Metals
-
Huo Tai-chan
Bell Laboratories Lucent Technologies
-
Yokoyama Toshifumi
Storage Media Systems Development Center Matsushita Electric Industrial Co. Ltd.
-
Okada Norio
System Lsi Design Engineering Division Nec Corporation
-
Kishimoto K
Nec Corp. Kanagawa Jpn
-
YOKOYAMA Takashi
ULSI Device Development Laboratories, NEC Corporation
-
YAMADA Yoshiaki
VLSI Manufacturing Engineering Division, NEC Corporation
-
USAMI Tatsuya
ULSI Device Development Laboratories, NEC Corporation
-
KAWAMOTO Hideaki
ULSI Device Development Laboratories, NEC Corporation
-
UENO Kazuyoshi
ULSI Device Development Laboratories, NEC Corporation
-
Yokoyama T
Storage Media Systems Development Center Matsushita Electric Industrial Co. Ltd.
-
Gomi H
Nec Corp. Kanagawa Jpn
-
Usami Tatsuya
Ulsi Device Development Laboratories Nec Corporation
-
KOYANAGI Ken-ichi
ULSI Device Development Laboratories, NEC Corporation
-
MATSUMOTO Akira
ULSI Device Development Laboratories, NEC Corporation
-
SUMIHIRO Naotaka
System LSI Design Engineering Division, NEC Corporation
-
Kawamoto Hideaki
Ulsi Device Development Laboratories Nec Corporation
-
Yokoyama T
Tokai Univ. Kanagawa Jpn
-
Sumihiro Naotaka
System Lsi Design Engineering Division Nec Corporation
-
Koyanagi Ken-ichi
Ulsi Device Development Laboratories Nec Corporation
-
Yokoyama Takashi
Ulsi Device Development Division Nec Corporation
-
Matsumoto Akira
Ulsi Device Development Laboratories Nec Corporation
-
Yokoyama Yoshihiko
Superconductivity Research Laboratory, International Superconductivity Technology Center
著作論文
- A 0.7-μm-Pitch Double Level Al Interconnection Technology for 1-Gbit DRAMs using SiO_2 Mask Al Etching and Plasma Enhanced Chemical Vapor Deposition SiOF
- Stability and Application to Multilevel Metallization of Fluorine-Doped Silicon Oxide by High-Density Plasma Chemical Vapor Deposition