Imai Masaharu | Graduate School Of Information Science And Technology Osaka University

スポンサーリンク

概要

関連著者

もっと見る

著作論文

Optimal Scheme for Search State Space and Scheduling on Multiprocessor Systems
Reconfigurable AGU : An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded Processors
Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling
Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram(System Level Design,VLSI Design and CAD Algorithms)
JPEG Encoder Design Space Exploration Using the ASIP Development System: PEAS-3 (特集:システムLSIの設計技術と設計自動化)
Heuristic Instruction Scheduling Algorithm Using Available Distance for Partial Forwarding Processor
AS-1-2 ASIP Meister : An ASIP Design Environment
Two-Stage Configurable Decoder Model for Domain Specific FEC Decoder Design
A Small-Area and Low-Power SoC for Less-Invasive Pressure Sensing Capsules in Ambulatory Urodynamic Monitoring

スポンサーリンク