Masahiro Fujita | VLSI Design and Education Center, the University of Tokyo
スポンサーリンク
概要
関連著者
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藤田 昌宏
東京大学大学院工学系研究科電子工学
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Masahiro Fujita
VLSI Design and Education Center, the University of Tokyo
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藤田 昌宏
東京大学VDEC
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FUJITA Masahiro
VLSI Design and Education Center (VDEC), The University of Tokyo
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藤田 昌彦
東京工業大学 大学院社会理工学研究科
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Fujita M
Sony Corp.
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Fujita Masahiro
Faculty Of Engineering University Of Tokyo
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Fujita Masahiro
Vlsi Design And Education Center (vdec) The University Of Tokyo
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Fujita Masahiro
Vlsi Design And Education Center The University Of Tokyo
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Masahiro Fujita
Vlsi Design And Education Center The Tokyo University Japan|crest Japan Science And Technology Agenc
著作論文
- Performance-Constrained Transistor Sizing for Different Cell Count Minimization
- AI-1-4 超ディペンダブルVLSIへの挑戦(AI-1.デイベンダブルVLSIに向けて,依頼シンポジウム,ソサイエティ企画)
- Synchronization Verification in System-Level Design with ILP Solvers(System Level Design,VLSI Design and CAD Algorithms)
- EFSM-based Weight-oriented Concolic Testing for Embedded Software
- Reducing scheduling overheads in dynamically reconfigurable processors (VLSI設計技術)
- Reducing scheduling overheads in dynamically reconfigurable processors (コンピュータシステム)
- Reducing scheduling overheads in dynamically reconfigurable processors (リコンフィギャラブルシステム)
- The AMS Extension to System Level Design Language-SpecC(System Level Design,VLSI Design and CAD Algorithms)
- Synchronization Mechanism for Timed/Untimed Mixed-Signal System Level Design Environment(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
- Word-Level Equivalence Checking in Bit-Level Accuracy by Synthesizing Designs onto Identical Datapath