Experimental Investigation of Pattern Layout Effect on Radio-Frequency Performance of Thin-Film Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors
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概要
- 論文の詳細を見る
This paper describes design considerations for the thin-film silicon-on-insulator power metal–oxide–semiconductor field-effect transistors for linear-amplification applications. The linear-amplification characteristics and DC performance depend on the grand interconnection pattern. We prefer to put the grand pattern on the drain (output) side. There are optimum finger lengths that provide the best linear amplification characteristics. The finger length also depends on the operating frequency and total gate width.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2007-09-15
著者
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Mino Masato
NTT Energy and Environment Systems Laboratories, Atsugi, Kanagawa 243-0198, Japan
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Matsumoto Satoshi
NTT Energy and Environment Systems Laboratories, 3-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0198, Japan
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Matsumoto Satoshi
NTT Energy and Environment Systems Laboratories, Atsugi, Kanagawa 243-0198, Japan
関連論文
- Design Considerations for Linear Amplification and Low-Insertion Loss Thin-Film Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors
- Experimental Investigation of Pattern Layout Effect on Radio-Frequency Performance of Thin-Film Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors
- Comparisons of Radio-Frequency Performance of Quasi-Silicon-on-Insulator and Conventional Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect-Transistors
- Comparisons of the Hot Carrier Effect in Quasi-Silicon-on-Insulator and Conventional Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated by Reversed Silicon Wafer Direct Bonding