Design Considerations for Linear Amplification and Low-Insertion Loss Thin-Film Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors
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概要
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This paper investigate for designing thin-film silicon-on-insulator (SOI) power metal–oxide–semiconductor field-effect transistors (MOSFETs) for linear-amplification and single pole double throw (SPDT)-switch applications. Considering 3.3-V operation (with a lithium ion battery as a power source), channel length of 0.5 μm is the best choice. For linear amplification, it is preferable to suppress the parasitic bipolar effect and reduce the on-resistance. For an SPDT switch, it is preferable to reduce on-resistance and use high-resistivity Si substrate. The effect of the silicon substrate resistivity in radio frequency SOI power MOSFET is found in insertion loss of the SPDT switch.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2007-05-15
著者
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Hiraoka Yasushi
NTT Energy and Environment Systems Laboratories, 3-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0198, Japan
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Hiraoka Yasushi
NTT Energy and Environment Systems Laboratories, 3-1 Morinosato-Wakamiya, Atsugi, Kanagawa 43-0198, Japan
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Matsumoto Satoshi
NTT Energy and Environment Systems Laboratories, 3-1 Morinosato-Wakamiya, Atsugi, Kanagawa 43-0198, Japan
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Matsumoto Satoshi
NTT Energy and Environment Systems Laboratories, 3-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0198, Japan
関連論文
- Design Considerations for Linear Amplification and Low-Insertion Loss Thin-Film Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors
- Experimental Investigation of Pattern Layout Effect on Radio-Frequency Performance of Thin-Film Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors
- Comparisons of Radio-Frequency Performance of Quasi-Silicon-on-Insulator and Conventional Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect-Transistors
- Comparisons of the Hot Carrier Effect in Quasi-Silicon-on-Insulator and Conventional Silicon-on-Insulator Power Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated by Reversed Silicon Wafer Direct Bonding