Simple and Accurate Method of Modeling Gate Current of N-Channel Metal–Oxide–Semiconductor Field-Effect Transistor
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概要
- 論文の詳細を見る
A mathematical method of modeling the gate leakage current $I_{\text{G}}$ is presented in this work. Both the shallow trench isolation and source drain extension effects on $I_{\text{G}}$ are included. With suitably chosen transistor dimensions, parameter extraction can be performed using the devices' drawn size, and the troublesome effective device length and width are not necessary in this model. The extracted parameters were used to predict the $I_{\text{G}}$ of devices with other different dimensions. Transistors fabricated with 90 nm technologies were examined.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2007-08-15
著者
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Gong Jeng
Institute Of Electronic Engineering National Tsing Hua University
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Gong Jeng
Institute of Electronic Engineering, National Tsing-Hua University, Hsinchu 30034, Taiwan, R.O.C.
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Chen Yen-Yu
Institute of Electronic Engineering, National Tsing-Hua University, Hsinchu 30034, Taiwan, R.O.C.
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Yeh Chun-Chia
Institute of Electronic Engineering, National Tsing-Hua University, Hsinchu 30034, Taiwan, R.O.C.
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Neih Chun-Feng
Institute of Electronic Engineering, National Tsing-Hua University, Hsinchu 30034, Taiwan, R.O.C.
関連論文
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- Noise Analysis of Nitride-Based Metal–Oxide–Semiconductor Heterostructure Field Effect Transistors with Photo-Chemical Vapor Deposition SiO2 Gate Oxide in the Linear and Saturation Regions
- Hot-Carrier Degradation Rate of High-Voltage Lateral Diffused Metal–Oxide–Semiconductor Field-Effect Transistors under Maximum Substrate Current Stress Conditions
- Simple and Accurate Method of Modeling Gate Current of N-Channel Metal–Oxide–Semiconductor Field-Effect Transistor
- Time-Dependent Drain- and Source-Series Resistance of High-Voltage Lateral Diffused Metal–Oxide–Semiconductor Field-Effect Transistors during Hot-Carrier Stress