20nm MOSFETにおけるソース・ドレイン抵抗の電気特性パラメータへの影響

概要

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In this work, the effects of source and drain resistances (RS, RD) on device characteristics are investigated for sub-20nm MOSFETs. The current driving capability is calculated for several structures such as planar bulk, SOI, and Multi gate MOSFETs by using the ITRS data. It is found that the degradation of the drain currents due to RS and RD becomes significant as the gate lengths are scale down to sub-20nm region. In order to investigate the effects of RS and RD on the device parameters such as the channel length modulation coefficient λ and the saturation drain current IDSAT, the drain currents are simulated by using the circuit simulation. The intrinsic MOSFET model parameters were extracted from the experimental ID-VD characteristic of 20nm nMOSFET. The source and drain resistances are changed from 0 to 100 ohm. It is found that the degradation of IDSAT due to RS and RD shows the linear gate voltage dependence. For the long channel MOSFET, the degradation of λ shows the linear gate voltage dependence. On the contrary, for the short channel MOSFET, the degradation of λ shows the little gate voltage dependence.