On-chip solar battery structure for CMOS LSI
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概要
- 論文の詳細を見る
A built-in method of on-chip solar battery in a CMOS LSI is proposed. The proposed solar battery can be formed using conventional CMOS process technology. It can generate a high voltage of 0.6-0.83 V by a series connection structure of two types of p-n junction diodes formed with the CMOS circuit simultaneously on the LSI chip. The generated voltage is sufficient to drive the conventional CMOS circuit without modi. cation. The test chip was produced experimentally using conventional 0.35 mu m CMOS technology, and the drive performance of the on-chip solar battery was evaluated. The conversion efficiency of the proposed solar battery was 2.6%. The area of the solar battery required for power consumption was 6.1 mm(2)/mu W in the case of the 2000lx illumination.
- 社団法人電子情報通信学会の論文
著者
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Arima Yutaka
Center For Microelectronic System Kyushu Institute Of Technology
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Ehara Masaya
Center for Microelectronic System, Kyushu Institute of Technology
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