C-12-33 40nm Self Synchronous Pipeline Stages with Autonomous Error Detection and Faulty Circuit Disabling for Robust Operation

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概要

• 論文の詳細を見る
• 一般社団法人電子情報通信学会の論文
• 2012-03-06

著者

• Ikeda Makoto

  Dept. of Electrical Engineering and Information Systems

• Asada Kunihiro

  Dept. of Electrical Engineering and Information Systems

• Asada Kunihiro

  Dept. Of Electronic Engineering The University Of Tokyo:vlsi Design And Education Center(vdec) The University Of Tokyo

• Devlin Benjamin

  Dept. Of Electronic Engineering The University Of Tokyo

• DEVLIN Benjamin

  Dept. of Electrical Engineering and information Systems, University of Tokyo

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