A CMOS over 12.8Gb/s 10-PAM transmitter for chip-to-chip communications
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概要
- 論文の詳細を見る
A multi-Gb/s serial link transmitter using multi-level pulse amplitude modulation is proposed. This work uses a 10 PAM to decrease the symbol rate to transfer multi-Gb/s signal. By reducing transmission frequency with 10-PAM, 12.8Gb/s data transmit is achieved. This work was designed using a 0.18μm CMOS technology and the results achieved 12.8Gb/s data rate, 200mV of data eye opening height with 1.8V supply voltage.
- 社団法人電子情報通信学会の論文
- 2009-06-17
著者
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BURM Jinwook
Dept. of Electronic Engineering, Sogang University
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Burm Jinwook
Sogang Univ. Seoul Kor
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Burm Jinwook
Dept. Of Electronic Engineering Sogang University
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Lee Jeongjun
Dept. of Electronic Engineering, Sogang University
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Jeong Jikyung
Dept. of Electronic Engineering, Sogang University
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Lee Jeongjun
Dept. Of Electronic Engineering Sogang University
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Jeong Jikyung
Dept. Of Electronic Engineering Sogang University
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