Signal Transmission and Coding Architecture for Next-Generation Ethernet(<Special Issue>New Technologies in the Internet and their Applications)

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概要

• 論文の詳細を見る

• The first practical approach to 100-Gigabit Ethernet, i.e., Ethernet with a throughput of 100-Gb/s, is proposed for use in the next generation of LANs for GRID computing and large-capacity data centers. New structures, including a coding architecture, de-skewing method and high-speed packaging techniques, are introduced to the PHY layer to obtain the required data rate. Our form of 100-Gigabit Ethernet uses 10-Gb/s × 10-channel CWDM or parallel-optical links. The coding architecture is formed of 64B/66B codes, modified for the CWDM and parallel links. In the de-skewing of the parallel signals, specially designed IDLE characters are used to compensate for skewing of data in the respective signal lanes. Advanced packaging techniques, which suppress the propagation loss and reflection of the 10-Gb/s lanes to obtain high-speed, good integrity and low-noise signaling, are proposed and evaluated. The proposed architectural features make this 100-Gigabit Ethernet concept practical for next-generation LANs.

• 社団法人電子情報通信学会の論文
• 2003-11-01

著者

• Nishimura Shinji

  Central Research Laboratory Hitachi Ltd.

• Nishimura S

  Central Research Laboratory Hitachi Ltd.

• Nishi Hiroaki

  Keio Univ. Yokohama‐shi Jpn

• TOYODA Hidehiro

  Central Research Laboratory, Hitachi, Ltd.

• NISHI Hiroaki

  Faculty of Science and Technology, Keio University

• KANAI Hisaaki

  Production Engineering Research Laboratory, Hitachi, Ltd.

• HARASAWA Katsuyoshi

  Hitachi Hybrid Network Co., Ltd.

• Harasawa Katsuyoshi

  Network Solutions System Group Hitachi Hybrid Network Co. Ltd.

• Kanai Hisaaki

  Production Engineering Research Laboratory Hitachi Ltd.

• Toyoda Hidehiro

  Central Research Laboratory Hitachi Ltd.

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• A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications(VLSI Architecture for Communication/Server Systems,VLSI Technology toward Frontiers of New Market)
• 100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet( The Next Generation Ethernet Technologies)
• Signal Transmission and Coding Architecture for Next-Generation Ethernet(New Technologies in the Internet and their Applications)
• Self-Organized Link State Aware Routing for Multiple Mobile Agents in Wireless Network
• Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router(Digital, Low-Power LSI and Low-Power IP)
• A Controller Design Method of Decentralized Control System
• A Multi-Plane Packet Switch Based on Combined Packet Distribution and Hierarchical Priority Scheduling(Switching)

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