Multibit Delta-Sigma Architectureswith Two-Level Feedback Loop Using a Dual-Quantization Architecture (Special Section on Analog Circuit Techniques Supporting the System LSI Era)
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概要
- 論文の詳細を見る
This paper proposes two novel Multi-bit Delta-Sigma Modulator (ΔΣM) architectures based on a Dual-Quantization architecture. By using multi-bit quantization with single-bit feedback, Both eliminate the need for a multi-bit digital-to-analog converter (DAC) in the feedback loop. The first is a Digital quantization-Error Canceling Multi-bit (DECM)-ΔΣM architecture that is able to achieve high resolution at a low oversampling ratio (OSR) because, by adjusting the coefficients of both analog and digital circuits, it is able to cancel completely the quantization error injected into the single-bit quantizer. Simulation results show that a signal-to-quantization-noise ratio of 90 dB is obtained with 3rd order 5-bit quantization DECM-ΔΣM at an OSR of 32. The second architecture, an analog-to-digital mixed (ADM)-ΔΣM architecture, uses digital integrators in place of the analog integrator circuits used in the ΔΣM. This architecture reduces both die area and power dissipation. We estimate that a (2+2)-th order ADM-ΔΣM with two analog-integrators and two digital-integrators will reduce the area of a 4-th order ΔΣM by 15%.
- 社団法人電子情報通信学会の論文
- 2001-02-01
著者
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Sakimura Noboru
System Devices Research Laboratories Nec Corporation
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Sakimura Noboru
Device Platforms Laboratories Nec Corporation
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Sakimura Noboru
Silicon System Research Laboratories System Devices And Fundamental Research Nec Corporation
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Yotsuyanagi Michio
Silicon System Research Laboratories System Devices And Fundamental Research Nec Corporation
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YAMAGUCHI Motoi
Silicon System Research Laboratories, System Devices and Fundamental Research, NEC Corporation
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Yamaguchi Motoi
Silicon System Research Laboratories System Devices And Fundamental Research Nec Corporation
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