Design Innovations for Multi-Gigahertz-Rate Communication Circuits with Deep-Submicron CMOS Technology (Special Issue on Ultra-High-Speed IC and LSI Technology)
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概要
- 論文の詳細を見る
In this paper, we briefly review the recent research on CMOS gigahertz-rate communication circuits. Then, we describe design innovations we have made to overcome limitations on communication speed. Using 0.25-pm CMOS technology, we developed a 4.25-Gb/s Fibre Channel transceiver that features an asynchronous tree-type l:8 demultiplexer and an 8-bit-to-10-bit frequency-conversion architecture. And using 0.15-μm CMOS technology, we developed an 11.8-GHz frequency divider that introduces the novel idea of a hysteresis-controlled latch (HC-latch). With these results, we discuss high-speed LSI design issues and future prospects.
- 社団法人電子情報通信学会の論文
- 1999-03-25
著者
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Fukaishi Muneo
Silicon Systems Research Laboratories Nec Corp.
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Nishikawa Masato
C&c Lsi Development Division Nec Corp.
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Yotsuyanagi M
Nec Corp. Sagamihara‐shi Jpn
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Yotsuyanagi Michio
Silicon System Research Laboratories System Devices And Fundamental Research Nec Corporation
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KURISU Masakazu
C&C LSI Development Division, NEC Corp.
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ASAZAWA Hiroshi
Mobile Communications Division, NEC Corp.
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NISHIKAWA Masato
C&C LSI Development Division, NEC Corp.
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NAKAMURA Kazuyuki
Silicon Systems Research Laboratories, NEC Corp.
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Kurisu M
C&c Lsi Development Division Nec Corp.
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Asazawa Hiroshi
Mobile Communications Division Nec Corp.
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Nakamura Kazuyuki
Silicon Systems Research Laboratories Nec Corp.
関連論文
- A 1.5V, 8mW, 8b, 15Msps BiCMOS A/D Converter (Special Section on Analog Circuit Techniques and Related Topics)
- Multibit Delta-Sigma Architectureswith Two-Level Feedback Loop Using a Dual-Quantization Architecture (Special Section on Analog Circuit Techniques Supporting the System LSI Era)
- Design Innovations for Multi-Gigahertz-Rate Communication Circuits with Deep-Submicron CMOS Technology (Special Issue on Ultra-High-Speed IC and LSI Technology)