A CMOS Offset Phase Locked Loop for a GSM Transmitter (Special Section on Analog Circuit Techniques and Related Topics)
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概要
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This paper describes a CMOS Offset Phase Locked Loop (OPLL) for a global system for mobile communications (GSM) transmitter. The OPLL is a PLL with a down-conversion mixer in the feedback path and is used in the transmit (Tx) path as a frequency converter. It has a tracking bandpass filter characteristic in such a way that the OPLL can suppress the noise in the GSM receiving band (TX noise) without a duplexer. When the loop bandwidth of the OPLL was 1.0MHZ, the Tx noise level of -163.5 dBC/HZ, the phase error of 0.66° rms, and the settling time of40 μs were achieved. The IC was implemented by using 0.35-μm CMOS process. It takes 860μm×620μm of total chip area and consumes 17.6 mA with a 3.0V power supply.
- 1999-02-25
著者
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YAMAWAKI Taizo
Central Research Laboratory, Hitachi Ltd.
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Yamawaki Taizo
Central Research Laboratory Hitachi Ltd.
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KOKUBO Masaru
Central Research Laboratory, Hitachi, Ltd.
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HAGISAWA Hiroshi
Semiconductor and Integrated Circuits Division, Hitachi Ltd.
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Kokubo Masaru
Central Research Laboratory Hitachi Ltd.
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Yamawaki T
Hitachi Ltd. Kokubunji‐shi Jpn
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Hagisawa H
Hitachi Ltd. Takasaki‐shi Jpn
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