A Transparent Transient Faults Tolerance Mechanism for Superscalar Processors(Dependable Systems)(<Special Issue>Dependable Computing)
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概要
- 論文の詳細を見る
In this paper, we propose a fault-tolerance mechanism for microprocessors, which detects transient faults and recovers from them. The investigation of fault-tolerance techniques for microprocessors is driven by two issues: One regards deep submicron fabrication technologies. Future semiconductor technologies could become more susceptible to alpha particles and other cosmic radiation. The other is the increasing popularitylications which are critical to our financial security, such as mobile banking, mobile trading, and making airline ticket reservations. Su of mobile platforms. Cellular telephones are currently used for appch applications demand that computer systems work correctly. In light of this, we propose a mechanism which is based on an instruction reissue technique for incorrect data speculation recovery and utilizes time redundancy, and evaluate our proposal using a timing simulator.
- 社団法人電子情報通信学会の論文
- 2003-12-01
著者
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Sato Toshinori
Department Of Biosciences And Informatics Faculty Of Science And Technology Keio University
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Sato Toshinori
Kyushu Univ. Fukuoka‐shi Jpn
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Sato Toshinori
Department Of Artificial Intelligence Kyushu Institute Of Technology
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Sato Toshinori
Department of Applied Chemistry, Keio University
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