A Simulation Methodology for Bidirectional Hot-Carrier Degradation in a Static RAM Circuit

概要

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A simulation methodology to analyze hotcarrier degradation due to bidirectional stressing in a static RAM circuit has been developed. The bidirectional stressing of pass transistors can approximate to unidirectional stressing. The effective stress direction of each ΝMOSFET can be determined by the higher of the two junction voltages at the peak substrate current generation. Aged SPICE parameter sets extracted in the forward or in the reverse mode are selected for simulating the degradation of each ΝMOSFET. Furthermore, effects of each ΝMOSFET degradation on the degraded circuit behavior are simulated. This technique helps detect an ΝMOSFET having the largest influence on the circuit aging, improving circuit reliability. The methodology was successfully applied to an SRAM device, and was validated by low temperature bias test data.
社団法人電子情報通信学会の論文
1998-06-25