Analysis of I_<DDQ> Occurrence in Testing

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概要

• 論文の詳細を見る

• This work presents an analysis of I_<DDQ> dependency on the primary current that flows through the bridging fault and driven gates current. A maximum primary current depends only on the test vectors which minimize channel resistances of transistors. The driven gates current generates when intermediate voltage occurs on the faulty node with creation current path between VDD and GND through the driven gates, and its value depends on circuit parameters such as transistor sizes and fan-in number of driven gates.

• 社団法人電子情報通信学会の論文
• 2001-04-01

著者

• Kawano K

  Okayama Univ. Okayama‐shi Jpn

• Kawano K

  Information Technology Center Okayama University

• Kinoshita K

  Department Of Information Networking Graduate School Of Information Science And Technology Osaka Uni

• Kinoshita Kozo

  Osaka Gakuin University

• Miura Yukiya

  Tokyo Metropolitan University

• KESHK Arabi

  Osaka University

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