High Performanee Parallel Query Processing on a 100 Node ATM Connected PC Cluster (Special Issue on New Generation Database Technologies)
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概要
- 論文の詳細を見る
We developed a PC cluster system which consists of 100 PCs as a test bed for massively parallel query processing. Each PC employs the 200 MHz Pentium Pro CPU and is connected with others through an ATM switch. Because the query processing applications are insensitive to the communication latency and mainly perform integer operations, the ATM connected PC cluster approach can be considered a reasonable solution for high performance database servers with low costs. However, there has been no challenge to construct large scale PC clusters for database applications, as far as the authors know. Though we employed commodity components as much as possible, we developed the DBMS itself, because that was a key component for obtaining high performance in parallel query processing, and there seemed no system which could meet our demand. On each PC node, a server program which acts as a database kernel is running to process the queries in cooperation with other nodes. The kernel was designed to execute pipelined operators and handle voluminous data efficiently, to achieve high performance on complex decision support type queries. We used the standard benchmark, TPC-D, on a 100 GB database to verify the feasibility of our approach, through comparison of our system with commercial parallel systems. As a whole, our system exhibited sufficiently high performance which was competitive with the current TPC-D top records, in spite of not using indices. For some heavy queries in the benchmark, which have high selectivity and joinability, our system performed much better. In addition, we applied transposed file organization to the database for further performance improvement. The transposed file organization vertically partitions the tuples, enabling attribute-by-attribute access to the relations. This resulted in significant performance improvement by reducing the amount of disk I/O and shifting the bottleneck to computation.
- 社団法人電子情報通信学会の論文
- 1999-01-25
著者
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KITSUREGAWA Masaru
Institute of Industrial Science, The University of Tokyo
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Tamura T
Silicon Technology Lab. Fujitsu Laboratories Ltd.
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TAMURA Takayuki
Information & Communication Systems Development Center, Mitsubishi Electric Corporation
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OGUCHI Masato
Institute of Industrial Science, The University of Tokyo
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Oguchi M
Institute Of Industrial Science The University Of Tokyo
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Kitsuregawa Masaru
Institute Of Industrial Science The University Of Tokyo
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