Special Issue on Asynchronous Circuit and System Design
スポンサーリンク
概要
- 論文の詳細を見る
- 社団法人電子情報通信学会の論文
- 1997-03-25
著者
-
Nanya Takashi
Research Center For Advanced Science & Technology University Of Tokyo
-
Nanya Takashi
Research Center for Advanced Science and Technology, University of Tokyo
関連論文
- Design Method of High Performance and Low Power Functional Units Considering Delay Variations(Circuit Synthesis,VLSI Design and CAD Algorithms)
- A Cascade ALU Architecture for Asynchronous Super-Scalar Processors (Special Issue on Low-Power High-Performance VLSI Processors and Technologies
- Verification and Violation Correction of Timing Constraints for Gate-Level Asynchronous Circuits (特集:システムLSIの設計技術と設計自動化)
- Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path Circuits (デザインガイヤ2000) -- (VLSIの設計/検証/テスト及び一般)
- Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path Circuits (デザインガイヤ2000) -- (VLSIの設計/検証/テスト及び一般)
- Verification of Timing Constraints for Fine-Grain Pielined Asynchronous Data-Path Circuits (デザインガイヤ2000) -- (VLSIの設計/検証/テスト及び一般)
- Evaluation of Checkpointing Mechanism on Score Cluster System(Dependable Software)(Dependable Computing)
- Synthesis of Asynchronous Circuits from Signal Transition Graph Specifications (Special Issue on Asynchronous Circuit and System Design)
- On Concurrent Error Detection of Asynchronous Circuits Using Mixed-Signal Approach (Special Issue on Asynchronous Circuit and System Design)
- Performance Comparison of Synchronous and Asynchronous VLSI Systems
- Synthesis Algorithm for Asynchronous Circuits from STG specifications
- Tolerating Interaction Faults Originated From External Systems
- Tolerating Interaction Faults Originated From External Systems
- Special Issue on Asynchronous Circuit and System Design
- Logic Optimization of Asynchronous Speed-Independent Circuits Using Transduction Methods (特集:システムLSIの設計技術と設計自動化)
- Special Issue on Fault-Tolerant Computing