A Surrounding-Gate Transistor with Multi-Pillar Silicon Channels
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概要
- 論文の詳細を見る
- 2005-09-13
著者
-
Woo Jason
Department Of Electrical Engineering University Of California
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Park Jaekwan
Department Of Electrical Engineering University Of California
関連論文
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- Gate Stack Architecture Analysis and Channel Engineering in Deep Sub-Micron MOSFETs
- Source/Drain Extension-to-Gate Overlap Scaling in Deep Sub-Micron MOSFETs
- A Surrounding-Gate Transistor with Multi-Pillar Silicon Channels
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