High Quality Hf-Silicate Gate Dielectrics Fabrication by Atomic Layer Deposition (ALD) Technology
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概要
- 論文の詳細を見る
- 2004-09-15
著者
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Kamiyama Satoshi
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
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Miura Takayoshi
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
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AOYAMA Tomonori
Research Dept. 1, Semiconductor Leading Edge Technologies (Selete), Inc.
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KITAJIMA Hiroshi
Research Dept. 1, Semiconductor Leading Edge Technologies (Selete), Inc.
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ARIKADO Tsunetoshi
Research Dept. 1, Semiconductor Leading Edge Technologies (Selete), Inc.
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Arikado Tsunetoshi
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
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Aoyama Tomonori
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
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Kitajima Hiroshi
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
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Kitajima Hiroshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE), 34 Miyukigaoka, Tsukuba-shi, Ibaraki-ken 305-8501, Japan
関連論文
- High Quality Hf-Silicate Gate Dielectrics Fabrication by Atomic Layer Deposition (ALD) Technology
- Production-Worthy HfSiON Gate Dielectric Fabrication Enabling EOT Scalability Down to 0.86nm and Excellent Reliability by Polyatomic Layer Chemical Vapor Deposition Technique
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs
- Improvements of Electrical Properties with Reduced Transient-Enhanced-Diffusion for 65nm-node CMOS Technology using Flash Lamp Annealing
- Extended Scalability of HfON/SiON Gate Stack Down to 0.57 nm Equivalent Oxide Thickness with High Carrier Mobility by Post-Deposition Annealing
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs