A High Performance 0.05μm MOSFET with Thin SOI/Buried Oxide Structure
スポンサーリンク
概要
- 論文の詳細を見る
- 1995-08-21
著者
-
Mizuno Tomohisa
Ulsi Research Laboratories Toshiba Corporation
-
Mizuno Tomohisa
Ulsi Research Labaratories Toshiba Corporation
-
NIIYAMA Hiromi
ULSI Process Engineering Laboratory, Microelectronics Engineering Laboratory, TOSHIBA Corporation
-
Ohba Ryuji
Ulsi Research Laboratories Toshiba Corporation
-
Ohuchi Kazuya
Semiconductor Device Engineering Laboratory Toshiba Corporation
-
Nakajima K
Tohoku Univ. Sendai Jpn
-
Niiyama H
Ulsi Process Engineering Laboratory Microelectronics Engineering Laboratory Toshiba Corporation
-
Niiyama Hiromi
Ulsi Process Engineering Lab. Microelectronics Engineering Lab. Toshiba Corp.
-
Mizuno T
Department Of Physics Faculty Of Engineering Yokohama National University
-
NAKAJIMA Kazuaki
ULSI Research Laboratories, Toshiba Corporation
-
Nakajima Kazuaki
Ulsi Research Laboratories Toshiba Corporation
関連論文
- Improved Electron-Beam/Deep-Ultraviolet Intralevel Mix-and-Match Lithography with 100 nm Resolution
- Magnetic and Electrical Behaviors of Sr_8V_8O_
- A High-Performance 0.05 μm SOI MOS FET:Possibility of Velocity Overshoot
- A High Performance 0.05μm MOSFET with Thin SOI/Buried Oxide Structure
- Optimization of a High-Performance Chemically Amplified Positive Resist for Electron-Beam Lithography
- Silicon-Based Single-Electron-Tunneling Transistor Operated at 4.2 K
- Limiting Performance of YBa_2Cu_3O_ High-frequency Josephson Devices
- Statistical Performance-Instability Due to Three-Dimensional Nonuniformity of Dopant Atoms in a System of Many MOSFETs
- Influence of Statistical Spatial-Nonuniformity of Dopant Atoms on Threshold Voltage in a System of Many MOSFETs