Improved Ti SALICIDE Technology Using High Dose Ge Pre-Amorphization for 0.10um CMOS and Beyond
スポンサーリンク
概要
- 論文の詳細を見る
- 1998-09-07
著者
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Suguro K.
Microelectronics Engineering Laboratory Toshiba Corporation Semiconductor Company
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Murakoshi A.
Ulsi Process Eng. Lab. Microelectronics Eng. Lab. Toshiba Corporation
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Toyoshima Y.
Microelectronics Engineering Laboratory Toshiba Corporation Semiconductor Company
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YOSHIMURA H.
Microelectronics Engineering Laboratory, Toshiba Corporation Semiconductor Company
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OHUCHI K.
ULSI Device Eng. Lab., Microelectronics Eng. Lab., Toshiba Corporation
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MIYASHITA K.
ULSI Device Eng. Lab., Microelectronics Eng. Lab., Toshiba Corporation
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YOSHIMURA H.
ULSI Device Eng. Lab., Microelectronics Eng. Lab., Toshiba Corporation
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SUGURO K.
ULSI Process Eng. Lab., Microelectronics Eng. Lab., Toshiba Corporation
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TOYOSHIMA Y.
ULSI Device Eng. Lab., Microelectronics Eng. Lab., Toshiba Corporation
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Toyoshima Y.
Center For Semiconductor Research & Development Toshiba Corporation Semiconductor Company
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Ohuchi K.
Microelectronics Engineering Laboratory Toshiba Corporation Semiconductor Company
関連論文
- New Guidelines of Optimizing SALICIDE Structure for High Speed CMOS LSI
- Improved Ti SALICIDE Technology Using High Dose Ge Pre-Amorphization for 0.10um CMOS and Beyond
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- Study of Parasitic Resistance Behavior and Its Extraction Method on Deeply Scaled MOSFETs
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