Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via-Plugs
スポンサーリンク
概要
- 論文の詳細を見る
- 1995-08-21
著者
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Ookawa H.
Manufacturing Engineering Research Center Toshiba Corporation
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Minamihaba G.
Ulsi Process Engineering Laboratory Toshiba Corporation
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Minamihaba G.
Ulsi Research Laboratories Toshiba Corporation
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SUGURO K.
ULSI Process Eng. Lab., Microelectronics Eng. Lab., Toshiba Corporation
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Suguro K.
Ulsi Research Laboratories Toshiba Corporation
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SHIMOOKA Y.
ULSI Research Laboratories, TOSHIBA Corporation
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TAMURA H.
ULSI Research Laboratories, TOSHIBA Corporation
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IIJIMA T.
ULSI Research Laboratories, TOSHIBA Corporation
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KAWANOUE T.
ULSI Research Laboratories, TOSHIBA Corporation
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HIRABAYASHI H.
Manufacturing Engineering Research Center, TOSHIBA Corporation
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SAKURAI N.
Manufacturing Engineering Research Center, TOSHIBA Corporation
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OBARA T.
Manufacturing Engineering Research Center, TOSHIBA Corporation
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EGAWA H.
Semiconductor Division, TOSHIBA Corporation
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IDAKA T.
Semiconductor Division, TOSHIBA Corporation
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KUBOTA T.
Semiconductor Division, TOSHIBA Corporation
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SHIMIZU T.
Semiconductor Division, TOSHIBA Corporation
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KOYAMA M.
Semiconductor Division, TOSHIBA Corporation
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OOSHIMA G.
Semiconductor Division, TOSHIBA Corporation
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Idaka T.
Semiconductor Division Toshiba Corporation
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Kawanoue T.
Ulsi Research Laboratories Toshiba Corporation
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Shimooka Y.
Ulsi Research Laboratories Toshiba Corporation
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Ooshima G.
Semiconductor Division Toshiba Corporation
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Iijima T.
Ulsi Research Laboratories Toshiba Corporation
関連論文
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- New Low k Material "LKD^" for Al Damascene Process Application
- Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via-Plugs