Bitwidth Optimization for Low Power Digital FIR Filter Design(<Special Section>Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)
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概要
- 論文の詳細を見る
We propose a novel approach for designing a low power datapath in wireless communication systems. Especially, we focus on the digital FIR filter. Our proposed approach can reduce the power consumption and the circuit area of the digital FIR filter by optimizing the bitwidth of the each filter coefficient with keeping the filter calculation accuracy. At first, we formulate the constraints about keeping accuracy of the filter calculations. We define the problem to find the optimized bitwidth of each filter coefficient. Our defined problem can be solved by using the commercial optimization tool. We evaluate the effects of consuming power reduction by comparing the digital FIR filters designed in the same bitwidth of all coefficients. We confirm that our approach is effective for a low power digital FIR filter.
- 社団法人電子情報通信学会の論文
- 2005-04-01
著者
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Yasuura Hiroto
Graduate School Of Engineering Sciences Kyushu University
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Muroyama Masanori
Department Of Computer Science And Communication Engineering Kyushu University
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Muroyama Masanori
Graduate School Of Information Science And Electrical Engineering Kyushu University
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Hyodo Akihiko
Department Of Computer Science And Communication Engineering Kyushu University
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TARUMI Kosuke
Graduate School of Information Science & Electrical Engineering, Kyushu University
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HYODO Akihiko
Graduate School of Information Science & Electrical Engineering, Kyushu University
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Tarumi Kosuke
Graduate School Of Information Science & Electrical Engineering Kyushu University
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Muroyama Masanori
Graduate School of Information Science & Electrical Engineering, Kyushu University
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