Low Voltage SOI Circuit Technology

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概要

• 論文の詳細を見る
• 2001-09-25

著者

• Yamada Junzo

  Ntt Telecommunications Energy Laboratories

• Yamada Junzo

  Ntt Technology Research Department

• DOUSEKI Takakuni

  NTT Telecommunications Energy Laboratories

• Yamada Junzo

  Ntt Telecommunications Energy Laboratories Ntt Corporation

• Douseki Takakuni

  Ntt Telecommunications Energy Laboratories Ntt Corporation

関連論文

• Energy-Reduction Effect of Ultralow-Voltage MTCMOS / SIMOX Circuits Using a Graph with Equispeed and Equienergy Lines (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
• A Low Power Multiplier Using Adiabatic Charging Binary Decision Diagram Circuit
• Evaluation of Soft-Error Immunity for 1-V CMOS Memory Cells with MTCMOS Technology (Special Issue on Microelectronic Test Structure)
• 3 to 5-GHz Si-Bipolar Quadrature Modulator and Demodulator Using a Wideband Frequency-Doubling Phase Shifter (Special Section on Analog Circuit Techniques Supporting the System LSI Era)
• A 0.5-V, Over 1-GHz, 1-mW MUX/DEMUX Core with Multi-Threshold Zero-Vth CMOS/SIMOX Technology
• A Low Power Multiplier Using Adiabatic Charging Binary Decision Diagram Circuit
• Low Voltage SOI Circuit Technology

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