スポンサーリンク
Silicon Systems Research Labs., NEC Corporation | 論文
- Effects of Selecting Channel Direction in Improving Performance of Sub-100nm MOSFETs Fabricated on (110) Surface Si Substrate
- Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation(High-κ Gate Dielectrics)
- Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation
- Impact of 1-2nm Gate Oxide for Sub-Quarter Micron Dual Gate CMOS
- First observation of SiO_2/Si(100) interfaces by spherical aberration-corrected high-resolution transmission electron microscopy
- Effects of Selecting Channel Direction in Improving Performance of Sub-100 nm MOSFETs Fabricated on (110) Surface Si Substrate