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NEC Corporation, Device Platforms Research Laboratories | 論文
- Breakdown Mechanisms and Lifetime Prediction for 90nm-node Low-power HfSiON/SiO_2 CMOSFETs
- Influences of Traps within HfSiON Bulk on Positive- and Negative-Bias Temperature Instability of HfSiON Gate Stacks
- 1.2nm HfSiON/SiON stacked gate insulators for 65nm-node MISFETs
- Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation(High-κ Gate Dielectrics)
- Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation
- Atomic Resolution TEM Images of the Au(001) Reconstructed Surface
- Epitaxy of Au and Ag on Cleaved (10, 0) Surface of MoS_2 : Surfaces, Interfaces and Films
- Improvement of Thermal Stability of MRAM Device with SiN Protective Film Deposited by HDP CVD
- Control of Multiple Magnetic Domain Walls by Current in a Co/Ni Nano-Wire
- Analysis of the Origin of the Threshold Voltage Change Induced by Impurity in Fully Silicided NiSi/SiO_2 gate stacks
- Formation of Nickel Self-Aligned Silicide by Using Cyclic Deposition Method
- Electron Holography Characterization of Ultra-Shallow Junctions in 30-nm Gate-length MOS-FETs
- Improvement of Thermal Stability of Magnetoresistive Random Access Memory Device with SiN Protective Film Deposited by High-Density Plasma Chemical Vapor Deposition
- Electron Holography Characterization of Ultra Shallow Junctions in 30-nm-Gate-Length Metal–Oxide–Semiconductor Field-Effect Transistors