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Graduate School of IPS, Waseda University | 論文
- Redundant via Insertion : Removing Design Rule Conflicts and Balancing via Density
- Interconnect Reduction in Binding Procedure of HLS
- Interconnect Reduction in Binding Procedure of HLS
- Interconnect Reduction in Binding Procedure of HLS
- Development of Carbonaceous Particle Size Analyzer Using Laser-induced Incandescence Technology
- Floorplanning for High Utilization of Heterogeneous FPGAs
- Interconnect Reduction in Binding Procedure of HLS
- A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition
- Exploration of Schedule Space by Random Walk
- All-Zero Block-Based Optimization for Quadtree-Structured Prediction and Residual Encoding in High Efficiency Video Coding
- Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips
- Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs
- Improving N-gram Distribution for Sampling-based Alignment by Extraction of Longer N-grams
- Network Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis