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Department of Information and Communications, Gwangju Institute of Science and Technology | 論文
- Synthesis for Testability of Synchronous Sequential Circuits with Strong-Connectivity Using Undefined States on State Transition Graph(Test)(VLSI Design and CAD Algorithms)
- High-Level Test Generation for Asynchronous Circuits from Signal Transition Graph(Special Section on VLSI Design and CAD Algorithms)
- Design of a Mutated Adder and Its Optimization Using ILP Formulation(Digital Circuits and Computer Arithmetic, Recent Advances in Circuits and Systems-Part 1)
- Low Latency Four-Flop Synchronizer with the Handshake Interface(Communications and Wireless Systems, Recent Advances in Circuits and Systems-Part 1)
- A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme(VLSI Design Technology and CAD)
- A Parallel Flop Synchronizer and the Handshake Interface for Bridging Asynchronous Domains(Logic Synthesis)(VLSI Design and CAD Algorithms)
- Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion(Integrated Electronics)
- Differential Value Encoding for Delay Insensitive Handshake Protocol(Communications and Wireless Systems, Recent Advances in Circuits and Systems-Part 1)
- A MAC Scheme Based on the Cell Arrival Timing Information for Multimedia Services over ATM-Based PON
- Asynchronous Array Multiplier with an Asymmetric Parallel Array Structure(Computer System Element)
- Performance Analysis of CDMA Mobile System Employing LPA Smart Antenna(Antennas and Propagation)
- Performance Comparison of Fast FH-FDMA Systems with Diversity Combining Receivers under Multitone Interference(Wireless Communication Technology)
- Sensitivity of SNR Degradation of OFDM to Carrier Frequency Offset in Shadowed Two-Path Channels(Wireless Communication Technology)
- Sensitivity of SNR Degradation of OFDM to Carrier Frequency Offset in Shadowed Two-Path Channels
- BER Performance of Satellite On-Board Processing Techniques with FH-MFSK Modulation under Various Interferences (2002 Joint Conference on Satellite Communications (JC-SAT 2002)--衛星通信技術及び一般)
- A Robust Recursive Least Square Algorithm against Impulsive Noise(Digital Signal Processing)
- Low Delay-Power Product Current-Mode Multiple Valued Logic for Delay-Insensitive Data Transfer Mechanism(VLSI Design Technology and CAD)
- Asynchronous Reorder Buffer for Asynchronous On-Chip Bus(Integrated Electronics)
- Analysis of Throughput in M-WDMA MAC Protocol for WDMA Networks(Network)
- Multimedia Ad Hoc Wireless LANs with Distributed Channel Allocation Based on OFDM-CDMA(Wireless Communication Technology)