MURAYAMA Keiichi | ULSI Laboratory, Mitsubishi Electric Corporation
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概要
ULSI Laboratory, Mitsubishi Electric Corporation | 論文
- Direct Measurement of Transient Drain Currents in Partially-Depleted SOI N-Channel MOSFETs Using a Nuclear Microprobe for Highly Reliable Device Designs
- A CAD-Compatible SOI-CMOS Gate Array Using 0.35 μm Partially-Depleted Transistors (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
- Analyses of the Radiation-Caused Characteristics Change in SOI MOSFETs Using Field Shield Isolation
- The Influence of the Buried Oxide Defects on the Gate Oxide Reliability and Drain Leakage Currents of the Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors
- Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs