Okuno Michitaka | Central Research Laboratory Hitachi Ltd.
スポンサーリンク
概要
関連著者
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OKUNO Michitaka
Central Research Laboratory, Hitachi Ltd.
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Okuno Michitaka
Central Research Laboratory Hitachi Ltd.
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Okuno Michitaka
Hitachi Ltd. Kokubunji‐shi Jpn
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Nishimura Shinji
Central Research Laboratory Hitachi Ltd.
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Nishimura S
Central Research Laboratory Hitachi Ltd.
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Nishi Hiroaki
Keio Univ. Yokohama‐shi Jpn
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Ishida Shinichi
Faculty Of Science And Technology Keio University
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TOYODA Hidehiro
Central Research Laboratory, Hitachi, Ltd.
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NISHI Hiroaki
Faculty of Science and Technology, Keio University
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Toyoda Hidehiro
Central Research Laboratory Hitachi Ltd.
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WAKAYAMA Koji
Central Research Laboratory, Hitachi Ltd.
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SUGAWA Jun
Central Research Laboratory, Hitachi Ltd.
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MASHIMO Daisuke
Central Research Laboratory, Hitachi Ltd.
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IKEDA Hiroki
Central Research Laboratory, Hitachi Ltd.
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SAKAMOTO Kenichi
Central Research Laboratory, Hitachi Ltd.
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Ikeda Hiroki
Central Research Laboratory Hitachi Ltd.
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Sakamoto Kenichi
Central Research Laboratory Hitachi Ltd.
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Sugawa Jun
Central Research Laboratory Hitachi Ltd.
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Wakayama Koji
Central Research Laboratory Hitachi Ltd.
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Mashimo Daisuke
Central Research Laboratory Hitachi Ltd.
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Nakahara Kouji
Central Research Laboratory Hitachi Ltd.
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Terada Matsuaki
Faculty Of Engineering And Technology Tokyo University Of Agriculture And Technology
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ISHIDA Shin-ichi
Faculty of Science and Technology, Keio University
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FUKUDA Kouji
Central Research Laboratory, Hitachi, Ltd.
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NISHI Hiroaki
the Faculty of Science and Technology, Keio University
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Fukuda Kouji
Central Research Laboratory Hitachi Ltd.
著作論文
- Design and Evaluation of 10Gbps Optical Access System Using Optical Switches
- Cache-Based Network Processor Architecture : Evaluation with Real Network Traffic(Novel Device Architectures and System Integration Technologies)
- A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications(VLSI Architecture for Communication/Server Systems,VLSI Technology toward Frontiers of New Market)
- 100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet( The Next Generation Ethernet Technologies)
- Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router(Digital, Low-Power LSI and Low-Power IP)