OKUNO Michitaka | Central Research Laboratory, Hitachi Ltd.

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概要

• OKUNO Michitakaの詳細を見る
• 同名の論文著者
• Central Research Laboratory, Hitachi Ltd.の論文著者

関連著者

• OKUNO Michitaka

  Central Research Laboratory, Hitachi Ltd.

• Okuno Michitaka

  Central Research Laboratory Hitachi Ltd.

• Okuno Michitaka

  Hitachi Ltd. Kokubunji‐shi Jpn

• Nishimura Shinji

  Central Research Laboratory Hitachi Ltd.

• Nishimura S

  Central Research Laboratory Hitachi Ltd.

• Nishi Hiroaki

  Keio Univ. Yokohama‐shi Jpn

• WAKAYAMA Koji

  Central Research Laboratory, Hitachi Ltd.

• SUGAWA Jun

  Central Research Laboratory, Hitachi Ltd.

• MASHIMO Daisuke

  Central Research Laboratory, Hitachi Ltd.

• IKEDA Hiroki

  Central Research Laboratory, Hitachi Ltd.

• SAKAMOTO Kenichi

  Central Research Laboratory, Hitachi Ltd.

• Ishida Shinichi

  Faculty Of Science And Technology Keio University

• TOYODA Hidehiro

  Central Research Laboratory, Hitachi, Ltd.

• NISHI Hiroaki

  Faculty of Science and Technology, Keio University

• Toyoda Hidehiro

  Central Research Laboratory Hitachi Ltd.

• Ikeda Hiroki

  Central Research Laboratory Hitachi Ltd.

• Sakamoto Kenichi

  Central Research Laboratory Hitachi Ltd.

• Sugawa Jun

  Central Research Laboratory Hitachi Ltd.

• Wakayama Koji

  Central Research Laboratory Hitachi Ltd.

• Mashimo Daisuke

  Central Research Laboratory Hitachi Ltd.

• Nakahara Kouji

  Central Research Laboratory Hitachi Ltd.

• Terada Matsuaki

  Faculty Of Engineering And Technology Tokyo University Of Agriculture And Technology

• ISHIDA Shin-ichi

  Faculty of Science and Technology, Keio University

• FUKUDA Kouji

  Central Research Laboratory, Hitachi, Ltd.

• NISHI Hiroaki

  the Faculty of Science and Technology, Keio University

• Fukuda Kouji

  Central Research Laboratory Hitachi Ltd.

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著作論文

• Design and Evaluation of 10 Gbps Optical Access System Using Optical Switches
• Design and Evaluation of 10Gbps Optical Access System Using Optical Switches
• Cache-Based Network Processor Architecture : Evaluation with Real Network Traffic(Novel Device Architectures and System Integration Technologies)
• A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications(VLSI Architecture for Communication/Server Systems,VLSI Technology toward Frontiers of New Market)
• 100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet( The Next Generation Ethernet Technologies)
• Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router(Digital, Low-Power LSI and Low-Power IP)

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