Masui Shoichi | Tohoku Univ. Sendai‐shi Jpn
スポンサーリンク
概要
関連著者
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Masui Shoichi
Tohoku Univ. Sendai‐shi Jpn
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Masui Shoichi
Tohoku University, Research Institute of Electrical Communication
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Lee Jun
Tohoku University
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Masui Shoichi
Tohoku University Research Institute Of Electrical Communication
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Lee Jun
Tohoku University Research Institute Of Electrical Communication
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Xu Zule
Tohoku University Research Institute Of Electrical Communication
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Xu Zule
Tohoku University
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Xu Zule
Tohoku University, Research Institute of Electrical Communication
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Lee Jun
Tohoku University, Research Institute of Electrical Communication
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Masui Shoichi
Tohoku University
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Konishi Takayuki
Tohoku Univ. Sendai‐shi Jpn
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Shi Jingbo
Tohoku University Research Institute Of Electrical Communication
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Kashimura Toru
Tohoku University Research Institute Of Electrical Communication
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Konishi Takayuki
Tohoku University, Research Institute of Electrical Communication
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Konishi Takayuki
Tohoku University Research Institute Of Electrical Communication
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Kondo Hideaki
Fujitsu Microelectronics Solutions
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SAWADA Masaru
Fujitsu Microelectronics Solutions
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MURAKAMI Norio
Fujitsu Microelectronics Solutions
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Masui Shoichi
Fujitsu Laboratories Ltd.
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TAKENAKA MASAHIKO
FUJITSU LABORATORIES LTD
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Takenaka Masahiko
Secure Computing Lab. Fujitsu Laboratories Ltd.
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Takenaka Masahiko
Fujitsu Laboratories Ltd.
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MUKAIDA Kenji
Fujitsu Ltd.
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TORII Naoya
Fujitsu Laboratories Ltd.
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Murmann Boris
Stanford Univ. Ca Usa
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Konishi Takayuki
Tohoku University
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INAZU Kenji
Tohoku University
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NATSUI Masanori
Tohoku University
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Murmann Boris
Stanford University
著作論文
- Self-Dithered Digital Delta-Sigma Modulators for Fractional-N Frequency Synthesizers
- Self-Dithered Digital Delta-Sigma Modulators for Fractional-N Frequency Synthesizers
- A 2.7mW 4th-Order Active G_m-RC Bandpass Filter with 60MHz Center Frequency and Digital/Analog Tuning Techniques
- A 2.7mW 4th-Order Active G_m-RC Bandpass Filter with 60MHz Center Frequency and Digital/Analog Tuning Techniques
- Design of Complex BPF with Automatic Digital Tuning Circuit for Low-IF Receivers
- Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm(Digital, Low-Power LSI and Low-Power IP)
- Self-Dithered Digital Delta-Sigma Modulators for Fractional-N Frequency Synthesizers
- Design Optimization of High-Speed and Low-Power Operational Transconductance Amplifier Using g_m/I_D Lookup Table
- Self-Dithered Digital Delta-Sigma Modulators for Fractional-N PLL
- Loop Design Optimization of Fourth-Order Fractional-N PLL Frequency Synthesizers