ITO Hideo | Faculty of Engineering, Chiba University
スポンサーリンク
概要
関連著者
-
ITO Hideo
Faculty of Engineering, Chiba University
-
Ito Hideo
Faculty Of Engineering Chiba University
-
Zeng Gang
Graduate School Of Information Science Nagoya University
-
Ohmameuda Toshiaki
Faculty Of Engineering Chiba University
-
Zeng Gang
Graduate School of Engineering, Nagoya University
-
Namba Kazuteru
Faculty Of Engineering Chiba University
-
Ito H
Chiba Univ. Chiba‐shi Jpn
-
Ito Hideo
Chiba Univ. Chiba‐shi Jpn
-
Hammadi N
Chiba Univ. Chiba‐shi Jpn
-
Hammadi Charif
Faculty Of Engineering Chiba University
-
Hammadi Nait
Graduate School Of Science And Technology Chiba University
-
Ito Hideo
The Authors Are With The Faculty Of Engineering Chiba University
-
Kitakami Masato
Vlsi Design And Education Center The University Of Tokyo
-
Kitakami Masato
Vlsi Design And Eduration Center The University Of Tokyo
-
Hammadi Nait
Faculty Of Engineering Chiba University
-
Kaneko Keiichi
Faculty Of Technology Tokyo University Of Agriculture And Technology
-
Ahmad N
千葉大 工
-
Zeng Gang
Graduate School Of Science And Technology Chiba University
-
Ahmad Nasir
Faculty of Engineering, Chiba University
-
Ahmad Nasir
Faculty Of Engineering Chiba University
-
Ohmameuda Toshiaki
The Authors Are With The Faculty Of Engineering Chiba University
-
Doumart Abderrahim
Graduate School of Science and Technology, Chiba University
-
Doumar Abderrahim
Graduate School of Science and Technology, Chiba University, Japan
-
Takabatake Toshinori
Graduate School Of Science And Technology Chiha University
-
Doumar Abderrahim
Graduate School Of Science And Technology Chiba University
-
Doumart Abderrahim
Graduate School Of Science And Technology Chiba University
-
Ito Hideo
Faculty Of Engineering Chiha University
著作論文
- X-Tolerant Test Data Compression for SOC with Enhanced Diagnosis Capability(Dependable Computing)
- A Learning Algorithm for Fault Tolerant Feedforward Neural Networks
- A Learning Algorithm for Fault Tolerant Feedforward Neural Networks (Special Issue on Fault-Tolerant Computing)
- Output Smoothing: A learning Algorithm for Fault Tolerant Neural Networks
- Hybrid Pattern BIST for Low-Cost Core Testing Using Embedded FPGA Core(Dependable Computing)
- Scan Design for Two-Pattern Test without Extra Latches(Dependable Computing)
- Fault-Tolerant Routing Algorithms for Hypercube Interconnection Networks
- FPGAs Complete Fault Diagnosis Based on Binary Tree BIST Method
- FPGAs Complete Fault Diagnosis Based on Binary Tree BIST Method
- Escape and Restoration Routing : Suspensive Deadlock Recovery in Interconnection Networks