Lee S. | Dram Pm Center Samsung Electronics Co.
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概要
関連著者
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Lee S.
Dram Pm Center Samsung Electronics Co.
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LEE S.
DRAM PM Center, Samsung Electronics Co.
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CHOI Y.
DRAM PM Center, Samsung Electronics Co.
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Kim S.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Choi Y.
Dram Pm Center Samsung Electronics Co.
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Jin G.
Dram Pm Center Samsung Electronics Co.
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Kim J.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim H.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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KIM Y.
Advanced Process division, Hynix Semiconductor Inc.
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PARK J.
Advanced Technology Development, Semiconductor R&D Div., Samsung Electronics Co., Ltd
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Kim Kinam
Dram Pm Center Samsung Electronics Co.
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LEE Chihoon
DRAM PM Center, Samsung Electronics Co.
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PARK J.
DRAM PM Center, Samsung Electronics Co.
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PARK S.
DRAM PA Team, Samsung Electronics Co.
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HONG S.
CAE, Samsung Electronics Co.
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KIM I.
DRAM PM Center, Samsung Electronics Co.
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LEE T.
DRAM PM Center, Samsung Electronics Co.
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JIN G.
DRAM PM Center, Samsung Electronics Co.
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Park S.
Dram Pa Team Samsung Electronics Co.
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Kim S.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Lee S.
Advanced Technology Development Samsung Electronics Co. Ltd
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Kim H.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Cho C.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Park Y.
Dram Process Architecture Team Samsung Electronics Co. Ltd.
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Park J.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Kang M.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Lee Chihoon
Dram Pm Center Samsung Electronics Co.
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Kim Y.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Kim H.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Jang S.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Kim Y.
Advanced Process Division Hynix Semiconductor Inc.
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Kim S.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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HA D.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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AN T.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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SIM M.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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PARK W.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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HAN D.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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JEON S.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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KWON S.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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CHOI Y.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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JEONG M.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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LEE T.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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JIN G.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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LEE W.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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RYU B.-I.
Advanced Technology Development Team I, Memory Division, Semiconductor Business, Samsung Electronics
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Kwon S.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Park J.
Dram Pm Center Samsung Electronics Co.
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Lee J.
Dram Process Architecture Team Samsung Electronics Co. Ltd.
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YUN C.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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BAE D.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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SHIN S.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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LEE D.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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LEE E.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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ROH B.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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NAM I.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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CHUNG T.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
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HYUN C.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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PARK D.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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MOON H.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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CHO T.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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KANG H.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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JEONG S.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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LEE S.
Fab Team 3, Memory Division, Samsung Electronics Co., Ltd.
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SUK J.
Fab Team 3, Memory Division, Samsung Electronics Co., Ltd.
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LIM B.
Fab Team 3, Memory Division, Samsung Electronics Co., Ltd.
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JEON Y.
Fab Team 3, Memory Division, Samsung Electronics Co., Ltd.
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JEON S.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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LEE K.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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OH K.
DRAM Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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LEE W.
SRAM/Flash Process Architecture Team, Memory Division, Samsung Electronics Co., Ltd.
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Kim S.
Dram Process Architecture Team Samsung Electronics Co. Ltd.
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Ryu B.-i.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Jeong S.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Park J.
Advanced Technology Development 2 Team Semiconductor R&d Center Memory Division Samsung Electron
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Kim S.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Lee S.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Lee S.
Dram Process Architecture Team Samsung Electronics Co. Ltd.
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Lee S.
Fab Team 3 Memory Division Samsung Electronics Co. Ltd.
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Kim I.
Dram Pm Center Samsung Electronics Co.
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Kim J.
Advanced Technology Development 2 Team Semiconductor R&d Center Memory Division Samsung Electron
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Moon H.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Lee W.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Lee W.
Sram/flash Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Lee W.
Advanced Manufacturing Technology Research Centre Department Of Industrial And Systems Engineering T
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Park W.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Kim H.
Advanced Joining & Welding Research Team Kitech
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Lee S.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Shin S.
Dram Process Architecture Team Samsung Electronics Co. Ltd.
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Kim J.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Sim M.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Sim M.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co
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Roh B.
Dram Process Architecture Team Samsung Electronics Co. Ltd.
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Oh K.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Lee K.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Jeon S.
Advanced Technology Development Team I Memory Division Semiconductor Business Samsung Electronics Co.
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Jeon S.
Dram Process Architecture Team Memory Division Samsung Electronics Co. Ltd.
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Jeon Y.
Fab Team 3 Memory Division Samsung Electronics Co. Ltd.
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LEE J.
DRAM Process Architecture Team, Samsung Electronics Co., Ltd.
著作論文
- URCAT (U-shaped-Recess-Channel-Array Transistor) Technology for 60nm DRAM and beyond
- Cost-Effective and Highly Reliable 6F2 Multi-Gigabit DRAM in 60nm Technology Node for Low Power and High Performance Applications
- A Novel Cell Structure with Bit Line Cap Spacer (BCS) and Top Enlarged Storage Node Contact (TESC) for 90nm DRAM Technology and Beyond
- Robust TiN/AHO/HSG-Cylinder Capacitor for High Density DRAMs