Fukuma Masao | Microelectronics Res. Labs., NEC Corporation
スポンサーリンク
概要
関連著者
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Fukuma Masao
Microelectronics Res. Labs., NEC Corporation
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Fukuma Masao
Microelectronics Res. Labs. Nec Corporation
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Matsuki Takeo
Microelectronics Res. Labs. Nec Corporation
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NAKAJIMA Ken
ULSI Device Development Labs, NEC Corporation
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MOGAMI Tohru
Microelectronics Research Laboratories, NEC Corporation
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TAKEUCHI Kiyoshi
Microelectronics Research Laboratories, NEC Corporation
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KUNIO Takemitsu
Microelectronics Research Laboratories, NEC Corporation
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MIYAMOTO Hidenobu
ULSI Device Development Research Laboratories, NEC Corporation
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Ikawa E
Ulsi Device Development Labs. Nec Corporation
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Ikawa Eiji
Ulsi Device Development Laboratories Nec Corporation
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Tanabe A
Nec Corp. Sagamihara‐shi Jpn
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Tanabe Akira
Toshiba Corp.
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Mogami T
Silicon Systems Research Laboratories Nec Corporation
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Mogami T
Nec Corp. Sagamihara‐shi Jpn
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Mogami Tohru
Microelectronics Research Laboratories Nec Corporation
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KUNIO Takemitsu
Silicon Systems Research Laboratories, NEC Corporation
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Kunio T
Silicon Systems Research Laboratories Nec Corporation
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Miyamoto H
Nagoya Inst. Technol. Nagoya‐shi Jpn
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Tanabe Akira
Microelectronics Res. Labs., NEC Corporation
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Yamamoto Toyoji
Microelectronics Res. Labs., NEC Corporation
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Aizaki Naoki
ULSI Device Development Labs., NEC Corporation
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Aizaki N
Ulsi Device Development Labs. Nec Corporation
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Fukuma M
Matsue National Coll. Technol. Matsue‐shi Jpn
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Yamamoto Toyoji
Microelectronics Res. Labs. Nec Corporation
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Johansson Lars
ULSI Device Development Laboratories, NEC Corporation
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Sakai Isami
ULSI Device Development Laboratories, NEC Corporation
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Sakai I
Nec Corp. Sagamihara‐shi Jpn
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Johansson Lars
Ulsi Device Development Laboratories Nec Corporation
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Kunio Takemitsu
Microelectronics Research Laboratories Nec
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Miyamoto Hidenobu
Ulsi Device Development Laboratories Nec Corporation
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Nakajima Ken
Ulsi Device Development Labs. Nec Corporation
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Takeuchi Kiyoshi
Microelectronics Res. Labs. Nec Corporation
著作論文
- 0.15μm CMOS Devices with Reduced Junction Capacitance
- Boron Penetration and Hot-Carrier Effects in Surface-Channel PMOSFETs with p^+ Poly-Si Gates