Kim Juho | Department Of Computer Science Sogang University

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• Kim Juhoの詳細を見る
• 同名の論文著者
• Department Of Computer Science Sogang Universityの論文著者

関連著者

• Kim Juho

  Department Of Computer Science Sogang University

• LEE Hyungwoo

  Department of Computer Science, Sogang University

• Lee Hyungwoo

  Department Of Computer Science Sogang University

• Kim J

  Department Of Computer Science Sogang University

• Shin Hakgun

  Department of Computer Science, Sogang University

• Shin Hakgun

  Department Of Computer Science Sogang University

• Kim In

  Department Of Animal Resource And Sciences Dankook University

• Jung Donggeun

  Department Of Physics And Institute Of Basic Science Sungkyunkwan University

• Kim Young

  Department Of Agricultural Chemistry The University Of Tokyo

• JE Jung

  Department of Materials Science and Engineering

• Kim Jeongpyo

  Korea Advanced Institute Of Science And Technology

• Kim Leejun

  Department Of Physics Brain Korea 21 Physics Research Division And Institute Of Basic Science Sungky

• Lee Jaichan

  Department Of Materials Engineering Sungkyunkwan University

• Kim J

  Korea Advanced Institute Of Science And Technology

• Kim Young

  Department of Materials Science and Engineering, Sung Kyun Kwan University, Suwon 440-746, Korea

• Lee Jaichan

  Department of Materials Science and Engineering, Sung Kyun Kwan University, Suwon 440-746, Korea

• Kim Leejun

  Department of Physics, Brain Korea21 Physics Research Division and Institute of Basic Science, Sung Kyun Kwan University, Suwon 440-746, Korea

• Je Jung

  Department of Materials Science and Engineering, POSTECH, Pohang 790-784, Korea

• Kim Juho

  Department of Materials Science and Engineering, Sung Kyun Kwan University, Suwon 440-746, Korea

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著作論文

• False-Aggressors-Aware True Crosstalk Noise Analysis with Logic Correlations for Accurate Timing Analysis(Session B2 Si Circuits)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Unified Gate Freezing, Gate Sizing and Buffer Insertion for Low Power CMOS Digital Circuit Design(Session B2 Si Circuits)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Efficient False Aggressors Pruning with Functional Correlation(Logic Synthesis)(VLSI Design and CAD Algorithms)
• Thickness Dependent Dielectric Property of BaTiO3/SrTiO3 Artificial Lattice
• Unified Gate Freezing, Gate Sizing and Buffer Insertion for Low Power CMOS Digital Circuit Design(Session B2 Si Circuits)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• False-Aggressors-Aware True Crosstalk Noise Analysis with Logic Correlations for Accurate Timing Analysis(Session B2 Si Circuits)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))

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